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dc.contributor.author Akhtar, MA
dc.contributor.author Saha, S
dc.contributor.author Pal, D
dc.contributor.author Verma, AK
dc.contributor.author Tir, Z
dc.date.accessioned 2024-01-17T15:53:56Z
dc.date.available 2024-01-17T15:53:56Z
dc.date.issued 2023
dc.identifier.uri https://repositorio.uoh.cl/handle/611/291
dc.description.abstract Nonfrequency transport delay-phase locked loop (NTD-PLL) is one of the simple grid synchronization approaches that aims to improve the phase and frequency estimation under frequency deviation. However, its amplitude estimation still exhibits double-frequency oscillations that are larger in magnitude as compared to the conventional transport delay (TD)-PLL counterpart. To overcome this challenge, two systematic approaches to design amplitude estimators (AEs) for NTD-PLL are presented in this article. One approach includes eliminating double-frequency oscillation error present in dq-frame component vd, whereas another uses Pythagorean trigonometric identity in afi-frame for accurate amplitude estimation. Due to the general form of AE proposed in afi-frame, it can be easily applied in the design of other TD-based PLLs. The design aspects of these methods are discussed in detail, and the efficacy of the proposed structures is finally evaluated through numerical and experimental results. Some methods to enhance the performance of the AEs are explored and analyzed. This article provides useful insight to the designers regarding the advantages and disadvantages associated with the proposed AEs for their specific applications.
dc.relation.uri http://dx.doi.org/10.1109/TPEL.2022.3226242
dc.subject Amplitude estimation
dc.subject Frequency estimation
dc.subject Phase locked loops
dc.subject Estimation
dc.subject Delays
dc.subject Geometry
dc.subject Time-frequency analysis
dc.subject phase-locked loop (PLL)
dc.subject Pythagorean trigonometric identity (PTI)
dc.subject synchronization
dc.subject transport-delay
dc.title A Systematic Approach to Design Amplitude Estimators for NTD-PLL: Performance Improvement Under Abnormal Grid Disturbances
dc.type Artículo
uoh.revista IEEE TRANSACTIONS ON POWER ELECTRONICS
dc.identifier.doi 10.1109/TPEL.2022.3226242
dc.citation.volume 38
dc.citation.issue 4
dc.identifier.orcid Tir, Zoheir/0000-0002-5793-5179
dc.identifier.orcid Verma, Anant Kumar/0000-0002-8719-4869
dc.identifier.orcid AKHTAR, MOHD AFROZ/0000-0003-3240-7326
uoh.indizacion Web of Science


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